asahi kasei [akd4644-b] 2006 / 03 - 1 - general description akd4644-b is an evaluation board for the AK4644, stereo codec with built-in mic/hp/rcv amplifier. the akd4644-b can evaluate a/d converter and d/a converter separately in addition to loop-back mode (a/d d/a). the akd4644-b also has the digital audio interface and can achieve the interface with digital audio systems via opt-connector. ? ordering guide akd4644-b --- evaluation board for AK4644 (cable for connecting with printer port of ibm-at compatible pc and control software are packed with this. this control software does not operate on windows nt.) function ? dit/dir with optical input/output ? 10pin header for serial control mode ? mini-jack for external stereo speaker ? on-board stereo class-d speaker amplifier (ak7830) 10pin header control data 10pin header 3.3v gnd hp min/ lin3/ rin3 ak4114 opt in opt out AK4644 lout/ rout 5v regulator lin1/ rin1 lin2/ rin2 dsp spl spr ak7830 figure 1. akd4644-b block diagram * circuit diagram and pcb layout are attached at the end of this manual AK4644 evaluation board rev.0 a kd4644-b
asahi kasei [akd4644-b] 2006 / 03 - 2 - evaluation board manual ? operation sequence 1) set up the power supply lines. [vcc] (red) = 5.0v (or 3.3v) [agnd] (black) = 0v [dgnd] (black) = 0v each supply line should be distri buted from the power supply unit. when the power is supplied to the AK4644 via the regulator, jp21 should be set to ?reg? side and vcc should be 5.0v. (when the power is supplie d from vcc jack to the AK4644 directly, jp21 should be set to ?vcc? side and vcc should be 3.3v.) 2) set up the evaluation mode, jumper pins. (see the followings.) 3) power on. the AK4644 and ak4114 should be reset once bringing sw1 ?l? upon power-up. and the ak7830 should be reset once bringing sw2(spk_pdn) ?l? upon power-up. ? evaluation mode (1) slave mode (1-1) evaluation of recording block (mic, adc) using dit of ak4114 (1-2) evaluation of playback block (hp, lout) using dir of ak4114 (1-3) evaluation of loop-back using ak4114 (1-4) all interface signals including master clock are fed externally. the ak4114?s audio interface format is fixed to i 2 s compatible. (1-1) evaluation of recording block using dit of ak4114 port2 (dit) and x1 (x?tal) are used. dit generates audio bi-phase signal from received data and which is output through optical connector (totx141). nothing should be connected to port1 (dir) and port3 (dsp). jp6 bick2 jp7 lrck2 jp11 sdti ad c dir jp8 lrck jp9 mclk jp10 bick (1-2) evaluation of playback block usi ng dir of ak4114 port1 (dir) is used. nothing should be connected to port3 (dsp). jp6 bick2 jp7 lrck2 jp11 sdti ad c dir jp8 lrck jp9 mclk jp10 bick the ak4114 operates at fs of 32khz or mo re. if the fs is slower than 32khz, any other evaluation mode without using dir should be used.
asahi kasei [akd4644-b] 2006 / 03 - 3 - (1-3) evaluation of loop-back using ak4114 x?tal oscillator (x1) is used. nothing should be connected to port1 (dir) and port3 (dsp). jp6 bick2 jp7 lrck2 jp11 sdti ad c dir jp8 lrck jp9 mclk jp10 bick the ak4114 operates at fs of 32khz or more. if the fs is slower than 32khz, any other evaluation mode without using dir should be used. (1-4) all interface signals including master clock are fed externally. port3 (dsp) is used. nothing should be connected to port1 (dir). jp6 bick2 jp7 lrck2 jp11 sdti ad c dir jp8 lrck jp9 mclk jp10 bick (2) master mode (2-1) evaluation of recording block using mclk of ak4114 (2-2) master clock is fed externally (2-1) evaluation of loop-back using mclk of ak4114 x?tal oscillator (x1) is us ed. nothing should be connected to port 1 (dir) and port3 (d sp). it can be evaluated at internal loop-back mode (loop bit = ?1?). it is possible to evaluate at various sampling frequencies using built-in AK4644?s pll. jp6 bick2 jp7 lrck2 jp11 sdti ad c dir jp8 lrck jp9 mclk jp10 bick (2-2) master clock is fed externally port3 (dsp) is used and mclk is fed from port3. nothing should be connected to port1 (dir). it can be evaluated at internal loop-back mode (loop bit = ?1?). it is possible to evaluate at various sampling frequencies using built-in AK4644?s pll. jp6 bick2 jp7 lrck2 jp11 sdti ad c dir jp8 lrck jp9 mclk jp10 bick
asahi kasei [akd4644-b] 2006 / 03 - 4 - ? other jumper pins set up 1. jp1 (gnd) : connection between agnd and dgnd. open : both grounds are separated on board. short : both grounds are connected on board. 2. jp2,jp3 : connection of mic power. open: mic power is not connected. short : mic power is connected. 3. jp12 : hvdd select. 3.3v : hvdd is supplied from the regurator (3.3v). 5v : hvdd is supplied from ?vcc? jack (5v). 4. jp16,jp17: select pin #5,28 pin #5 pin #28 jp16 jp17 ain3 bit vcoc min vcoc open 0 rin3 lin3 rin3 short 1 5. jp18,jp19,jp20 : select the input from min/lin3/rin3. pin #26 pin #27 jp18 jp19 jp20 rcv bit rout lout open open short 0 rcn rcp short short open 1 6. jp22 : select the power booster of ak7830. vcc : power booster on gnd: power booster off ? the function of the toggle sw [sw1] (pdn): power down of AK4644 and ak4114. keep ?h? during normal operation. [sw2] (spk_pdn): power down of ak7830. keep ?h? during normal operation. ? indication for led [led1] (erf): monitor int0 pin of the ak4114. led turns on when some error has occurred to ak4114.
asahi kasei [akd4644-b] 2006 / 03 - 5 - ? serial control the AK4644 can be controlled via the printer port (parallel port) of ibm-at compatible pc. connect port4 (ctrl) with pc by 10 wire flat cable packed with the akd4644. when i 2 c bus mode is used, port4 should be directly connected to the i 2 c bus on the system. jp13,14 and 15 should be set to i 2 c bus mode to control the ak7830. connect csn scl/cclk sda/cdti 10pin header 10pin connector 10 wire flat cable pc akd4644-b figure 2. connect of 10 wire flat cable (1) 3-wire serial co ntrol mode the jumper pins should be set to the following. (2) i 2 c-bus control mode the jumper pins should be set to the following. (2-1) in case of using cad0=0 (device address bits). (2-2) in case of using cad0=1 (device address bits). jp13 i2c_sel jp15 sda i2c 3-wire jp14 cad0 jp13 i2c_sel jp15 sda i2c 3-wire jp14 cad0 jp13 i2c_sel jp15 sda i2c 3-wire jp14 cad0
asahi kasei [akd4644-b] 2006 / 03 - 6 - ? analog input/output circuits (1) input circuits 1. min/lin3/rin3 input circuit 3 6 4 + c14 1u j2 beep r15 20k min/lin3 + c26 1u rin3 jp17 lin3 figure 3. min/lin3/rin3 input circuit 2. line1 input circuit lin1 rin1 r2 2.2k r1 2.2k jp2 lin1 jp3 rin1 3 6 4 + c2 1u + c3 1u mpwr j5 lin1/rin1 figure 4. lin1/rin1 input circuit 3. line2 input circuit + c18 1u lin2 rin2 3 6 4 j3 lin2/rin2 + c19 1u figure 5. lin2/rin2 input circuit
asahi kasei [akd4644-b] 2006 / 03 - 7 - (2) output circuits 1. headphone-amp output circuit 3 6 4 c16 0.22u c17 0.22u r17 10 r18 10 + c15 47u r14 0 ( short ) + c13 47u r16 0 ( short ) j1 hp hpr hpl figure 6. headphone-amp output circuit 2. stereo line output circuit + c21 1u r23 220 r22 20k rout lout 3 6 4 j6 lout/rout/rcv r24 20k + c20 1u r21 220 jp19 rcp jp18 rcn jp20 lineout figure 7. stereo line output circuit
asahi kasei [akd4644-b] 2006 / 03 - 8 - 3. external speaker-amp(ak7830) output circuit j 8 spp_l 6 4 3 v c_l_ p v c_l_n vc_l_p vc_l_n j 7 spp_r 6 4 3 v c_r_p v c_r_n vc_r_p vc_r_n figure 8. external speaker-amp(ak7830) output circuit ? akm assumes no responsibility for the trouble when using the above circuit examples.
asahi kasei [akd4644-b] 2006 / 03 - 9 - control software manual ? set-up of evaluation board and control software 1. set up the akd4644-b according to previous term. 2. connect ibm-at compatible pc with akd4644-b by 10-line type flat cable (packed with akd4644-b). take care of the direction of 10pin header. (please install the driver in the cd-rom when this control software is used on windows 2000/xp. please refer ?installation manual of control software driver by akm device control software?. in case of windows95/98/me, this installation is not needed. this control software does not operate on windows nt.) 3. insert the cd-rom labeled ?akd4644-b evaluation kit? into the cd-rom drive. 4. access the cd-rom drive and double-click the icon of ?akd4644.exe? to set up the control program. when control the ak7830 with the serial mode, double-click the icon of ?akd7830.exe? to set up the control program. 5. then please evaluate according to the follows. ? operation flow keep the following flow. 1. set up the control program according to explanation above. 2. click ?port reset? button. 3. click ?write default? button ? explanation of each buttons 1. [port reset] : set up the usb interface board (akdusbif-a) when using the board. 2. [write default] : initialize the register of the AK4644. 3. [all write] : write all registers that is currently displayed. 4. [function1] : dialog to write data by keyboard operation. 5. [function2] : dialog to write data by keyboard operation. 6. [function3] : the sequence of register setting can be set and executed. 7. [function4] : the sequence that is created on [function3] can be assigned to buttons and executed. 8. [function5]: the register setting that is created by [save] function on main window can be assigned to buttons and executed. 9. [save] : save the current register setting. 10. [open] : write the saved values to all register. 11. [write] : dialog to write data by mouse operation. ? indication of data input data is indicated on the register map. red letter indicates ?h? or ?1? and blue one indicates ?l? or ?0?. blank is the part that is not defined in the datasheet.
asahi kasei [akd4644-b] 2006 / 03 - 10 - ? explanation of each dialog 1. [write dialog] : dialog to write data by mouse operation there are dialogs corresponding to each register. click the [write] button corresponding to each register to set up the dialog. if you check the check box, data becomes ?h? or ?1?. if not, ?l? or ?0?. if you want to write the input data to the AK4644, click [ok] button. if not, click [cancel] button. 2. [function1 dialog] : dialog to write data by keyboard operation address box: input registers address in 2 figures of hexadecimal. data box: input registers data in 2 figures of hexadecimal. if you want to write the input data to the AK4644, click [ok] button. if not, click [cancel] button. 3. [function2 dialog] : dialog to evaluate datt there are dialogs corresponding to register of 09h, 0ah, 0ch, and 0dh. address box: input registers address in 2 figures of hexadecimal. start data box: input starts data in 2 figures of hexadecimal. end data box: input end data in 2 figures of hexadecimal. interval box: data is written to the AK4644 by this interval. step box: data changes by this step. mode select box: if you check this check box, data reaches end data, and returns to start data. [example] start data = 00, end data = 09 data flow: 00 01 02 03 04 05 06 07 08 09 09 08 07 06 05 04 03 02 01 00 if you do not check this check box, data reaches end data, but does not return to start data. [example] start data = 00, end data = 09 data flow: 00 01 02 03 04 05 06 07 08 09 if you want to write the input data to the AK4644, click [ok] button. if not, click [cancel] button.
asahi kasei [akd4644-b] 2006 / 03 - 11 - 4. [save] and [open] 4-1. [save] all of current register setting values displayed on the main window are saved to the file. the extension of file name is ?akr?. (1) click [save] button. (2) set the file name and click [save] button. the extension of file name is ?akr?. 4-2. [open] the register setting values saved by [save] are written to the AK4644. the file type is the same as [save]. (1) click [open] button. (2) select the file (*.akr) and click [open] button.
asahi kasei [akd4644-b] 2006 / 03 - 12 - 5. [function3 dialog] the sequence of register setting can be set and executed. (1) click [f3] button. (2) set the control sequence. set the address, data and interval time. set ?-1? to the address of the step where the sequence should be paused. (3) click [start] button. then this sequence is executed. the sequence is paused at the step of interval="-1". click [start] button, the sequence restarts from the paused step. this sequence can be saved and opened by [save] and [open] button on the function3 window. the extension of file name is ?aks?. figure 8. window of [f3]
asahi kasei [akd4644-b] 2006 / 03 - 13 - 6. [function4 dialog] the sequence file (*.aks) saved by [function3] can be listed up to 10 files, assigned to buttons and then executed. when [f4] button is clicked, the window as shown in figure 10 opens. figure 9. [f4] window
asahi kasei [akd4644-b] 2006 / 03 - 14 - 6-1. [open] buttons on left side and [start] buttons (1) click [open] button and select the sequence file (*.aks) saved by [function3]. the sequence file name is displayed as shown in figure 11. ( in case that the selected sequence file name is ?dac_stereo_on.aks?) figure 10. [f4] window(2) (2) click [start] button, then the sequence is executed. 6-2. [save] and [open] buttons on right side [save] : the name assign of sequence file displayed on [function4] window can be saved to the file. the file name is ?*.ak4?. [open] : the name assign of sequence file(*.ak4) saved by [save] is loaded. 6-3. note (1) this function doesn't support the pause function of sequence function. (2) all files used by [save] and [open] function on right side need to be in the same folder. (3) when the sequence is changed in [function3], the sequence file (*.aks) should be loaded again in order to reflect the change.
asahi kasei [akd4644-b] 2006 / 03 - 15 - 7. [function5 dialog] the register setting file(*.akr) saved by [save] function on main window can be listed up to 10 files, assigned to buttons and then executed. when [f5] button is clicked, the window as shown in figure 12 opens. figure 11. [f5] window 7-1. [open] buttons on left side and [write] button (1) click [open] button and select the register setting file (*.akr). the register setting file name is displayed as shown in figure 13. (in case that the selected file name is ?dac_output.akr?) (2) click [write] button, then the register setting is executed.
asahi kasei [akd4644-b] 2006 / 03 - 16 - figure 12. [f5] windows(2) 7-2. [save] and [open] buttons on right side [save] : the name assign of register setting file displayed on [function5] window can be saved to the file. the file name is ?*.ak5?. [open] : the name assign of register setting file(*.ak5) saved by [save] is loaded. 7-3. note (1) all files used by [save] and [open] function on right side need to be in the same folder. (2) when the register setting is changed by [save] button on the main window, the register setting file (*.akr) should be loaded again in order to reflect the change.
asahi kasei [akd4644-b] 2006 / 03 - 17 - measurement results 1. ext mode (slave mode) [measurement condition] measurement unit: audio precision, system two cascade ext slave mode bick: 64fs bit: 16bit measurement frequency: 20hz 20kh power supply: avdd=dvdd=hvdd=3.3v temperature: room input frequency: 1khz sampling frequency: 44.1khz [measurement results] adc (lin2/rin2) characteristics (ivol=0db, alc1 = off, lin2/rin2 ? adc ? ivol) l[db] r[db] mic-amp gain 0db +20db 0db +20db s/(n+d) 20khzlpf ( ? 1db) 90.8 90.2 84.3 84.2 dr 20khzlpf + a-weighted 95.6 95.6 87.4 87.4 s/n 20khzlpf + a-weighted 95.7 95.7 87.4 87.4 dac (lout/rout) characteristics (r l =10k ? , dac ? lout/rout) l[db] r[db] s/(n+d) 20khzlpf ( ? 3db) 89.7 89.7 s/n 20khzlpf + a-weighted 94.6 94.6
asahi kasei [akd4644-b] 2006 / 02 - 18 - 2. plot data 2-1 adc (lin2/rin2 ? adc) (+20db) figure 13. thd+n vs. input level figure 14. thd+n vs. input frequency a km a k4644 thd+n vs input level fs=44.1khz , fin=1khz -120 -10 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 dbr -100 -60 -97.5 -95 -92.5 -90 -87.5 -85 -82.5 -80 -77.5 -75 -72.5 -70 -67.5 -65 -62.5 d b f s a km a k4644 thd+n vs input frequency fs=44.1khz , -1db input 20 20k 50 100 200 500 1k 2k 5k 10k hz -100 -60 -97.5 -95 -92.5 -90 -87.5 -85 -82.5 -80 -77.5 -75 -72.5 -70 -67.5 -65 -62.5 d b f s
asahi kasei [akd4644-b] 2006 / 02 - 19 - a km a k4644 linearity fs=44.1khz , fin=1khz -110 +0 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbr -110 +0 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s figure 15. linearity figure 16. frequency response a km a k4644 frequency response fs=44.1khz , -1db input 20 20k 50 100 200 500 1k 2k 5k 10k hz -3 +0 -2.8 -2.6 -2.4 -2.2 -2 -1.8 -1.6 -1.4 -1.2 -1 -0.8 -0.6 -0.4 -0.2 d b f s
asahi kasei [akd4644-b] 2006 / 02 - 20 - figure 17. fft plot (input level= -1dbfs) figure 18. fft plot (input level= -60dbfs) a km a k4644 ain2 -> adc fft fs=44.1khz , fin=1khz , -1db input 20 20k 50 100 200 500 1k 2k 5k 10k hz -160 +0 -150 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s a km a k4644 ain2 -> adc fft fs=44.1khz , fin=1khz , -60db input 20 20k 50 100 200 500 1k 2k 5k 10k hz -160 +0 -150 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s
asahi kasei [akd4644-b] 2006 / 02 - 21 - figure 19. fft plot (no signal) a km a k4644 crosstalk fs=44.1khz , -1db input red : rch ->lch , blue : lch -> rch 20 20k 50 100 200 500 1k 2k 5k 10k hz -140 -70 -135 -130 -125 -120 -115 -110 -105 -100 -95 -90 -85 -80 -75 d b figure 20. crosstalk plot a km a k4644 ain2 -> adc fft fs=44.1khz , fin=1khz , no signal 20 20k 50 100 200 500 1k 2k 5k 10k hz -160 +0 -150 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s
asahi kasei [akd4644-b] 2006 / 02 - 22 - 2-2 adc (lin2/rin2 ? adc) (0db) figure 21. thd+n vs. input frequency figure 22. thd+n vs. input frequency a km a k4644 thd+n vs input level fs=44.1khz , fin=1khz last.at2c -100 -60 -97.5 -95 -92.5 -90 -87.5 -85 -82.5 -80 -77.5 -75 -72.5 -70 -67.5 -65 -62.5 d b f s -120 -10 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 dbr a km a k4644 thd+n vs input frequency fs=44.1khz , -1db input 20 20k 50 100 200 500 1k 2k 5k 10k hz -100 -60 -97.5 -95 -92.5 -90 -87.5 -85 -82.5 -80 -77.5 -75 -72.5 -70 -67.5 -65 -62.5 d b f s
asahi kasei [akd4644-b] 2006 / 02 - 23 - figure 23. linearity figure 24. frequency response a km a k4644 linearity fs=44.1khz , fin=1khz -110 +0 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbr -110 +0 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s a km a k4644 frequency response fs=44.1khz , -1db input 20 20k 50 100 200 500 1k 2k 5k 10k hz -3 +0 -2.8 -2.6 -2.4 -2.2 -2 -1.8 -1.6 -1.4 -1.2 -1 -0.8 -0.6 -0.4 -0.2 d b f s
asahi kasei [akd4644-b] 2006 / 02 - 24 - figure 25. fft plot (input level= -1dbfs) figure 26. fft plot (input level = -60dbfs) a km a k4644 ain2 -> adc fft fs=44.1khz , fin=1khz , -1db 20 20k 50 100 200 500 1k 2k 5k 10k hz -160 +0 -150 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s a km a k4644 ain2 -> adc fft fs=44.1khz , fin=1khz , -1db 20 20k 50 100 200 500 1k 2k 5k 10k hz -160 +0 -150 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s
asahi kasei [akd4644-b] 2006 / 02 - 25 - figure 27. fft plot ( no signal ) figure 28. crosstalk plot a km a k4644 crosstalk fs=44.1khz , -1db input red : rch ->lch , blue : lch -> rch 20 20k 50 100 200 500 1k 2k 5k 10k hz -140 -70 -135 -130 -125 -120 -115 -110 -105 -100 -95 -90 -85 -80 -75 d b a km a k4644 ain2 -> adc fft fs=44.1khz , fin=1khz , -1db 20 20k 50 100 200 500 1k 2k 5k 10k hz -160 +0 -150 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b f s
asahi kasei [akd4644-b] 2006 / 02 - 26 - 2-3 dac (dac ? lout/rout) figure 29. thd+n vs. input level figure 30.thd+n vs. input frequency a km a k4644 dac -> lineout thd+n vs input level fs=44.1khz , fin=1khz -100 -60 -97.5 -95 -92.5 -90 -87.5 -85 -82.5 -80 -77.5 -75 -72.5 -70 -67.5 -65 -62.5 d b r a -120 +0 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbfs a km a k4644 dac -> lineout thd+n vs input frequency fs=44.1khz , fin=1khz -100 -60 -97.5 -95 -92.5 -90 -87.5 -85 -82.5 -80 -77.5 -75 -72.5 -70 -67.5 -65 -62.5 d b r a 20 20k 50 100 200 500 1k 2k 5k 10k hz
asahi kasei [akd4644-b] 2006 / 02 - 27 - figure 31. linearity figure 32. frequency response a km a k4644 dac -> lineout linearity fs=44.1khz , fin=1khz -110 +0 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a -110 +0 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 dbfs a km a k4644 dac -> lineout frequency response fs=44.1khz , fin=1khz -1 +1 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 +0 +0.1 +0.2 +0.3 +0.4 +0.5 +0.6 +0.7 +0.8 +0.9 d b r a 2k 20k 4k 6k 8k 10k 12k 14k 16k 18k hz
asahi kasei [akd4644-b] 2006 / 02 - 28 - figure 33. fft plot (input level= 0dbfs) figure 34. fft plot (input level = -60dbfs) a km a k4644 dac --> lineout fft fs=44.1khz , fin=1khz , 0db input 20 20k 50 100 200 500 1k 2k 5k 10k hz -160 +10 -150 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 +0 d b r a a km a k4644 dac --> lineout fft fs=44.1khz , fin=1khz , -60db input 20 20k 50 100 200 500 1k 2k 5k 10k hz -160 +0 -150 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a
asahi kasei [akd4644-b] 2006 / 02 - 29 - figure 35. fft plot (no signal) figure 36. crosstalk plot a km a k4644 dac -> lineout crosstalk fs=44.1khz , fin=1khz , 0db input -140 -60 -135 -130 -125 -120 -115 -110 -105 -100 -95 -90 -85 -80 -75 -70 -65 d b 20 20k 50 100 200 500 1k 2k 5k 10k hz a km a k4644 dac --> lineout fft fs=44.1khz , fin=1khz , no signal 20 20k 50 100 200 500 1k 2k 5k 10k hz -160 +0 -150 -140 -130 -120 -110 -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 d b r a
asahi kasei [akd4644-b] 2006 / 03 - 30 - revision history date (yy/mm/dd) manual revision board revision reason contents 06/03/08 km082800 0 first edition important notice ? these products and their specifications are subject to change without notice. before considering any use or application, consult the asahi kasei microsystems co., ltd. (akm) sales office or authorized distributor concerning their current status. ? akm assumes no liability for infringement of any patent, intellectual property, or other right in the application or use of any information contained herein. ? any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulati ons of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. ? akm products are neither intended nor authorized for use as critical components in any safety, life support, or other hazard related device or system, and akm assumes no responsibility relating to any such use, except with the express written consent of the representative director of akm. as used here: (a) a hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. (b) a critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. ? it is the responsibility of the buyer or distributo r of an akm product who distributes, disposes of, or otherwise places the product with a third party to notify that party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold akm harmless from any and all claims arising from the use of said product in the absence of such notification.
a a b b c c d d e e e e d d c c b b a a bick lrck sdti cclk csn pdn cdti mcki sdto reg min/lin3 lout rout hpl hpr lin2 rin2 rin1 lin1 vcc reg mpwr rin3 title size document number rev date: sheet of AK4644 0 akd4644-b a3 16 wednesday, february 08, 2006 title size document number rev date: sheet of AK4644 0 akd4644-b a3 16 wednesday, february 08, 2006 title size document number rev date: sheet of AK4644 0 akd4644-b a3 16 wednesday, february 08, 2006 dgnd agnd 5v 3.3v rin3 vcoc jp12 hvdd jp12 hvdd jp13 i2c-sel jp13 i2c-sel mpwr 1 vcom 2 avss 3 avdd 4 vcoc/rin3 5 i2c 6 pdn 7 csn/cad0 8 cclk/scl 9 cdti / sda 10 sdti 11 lrck 13 bick 14 dvdd 15 dvss 16 mcki 17 mcko 18 test1 19 test2 20 hvdd 21 hvss 22 hpr 23 rout / rcn 26 lout / rcp 27 min / lin3 28 rin2 / in2- 29 lin2 / in2+ 30 lin1 / in1- 31 rin1/in1+ 32 sdto 12 hpl 24 mutet 25 u6 AK4644 u6 AK4644 jp16 rin3 jp16 rin3 r10 51 r10 51 c7 0.1u c7 0.1u + c12 10u + c12 10u r11 51 r11 51 r3 10k r3 10k + c9 10u + c9 10u r7 51 r7 51 r6 51 r6 51 r8 51 r8 51 r12 51 r12 51 jp1 gnd jp1 gnd + c1 1u + c1 1u + c6 10u + c6 10u tp2 tp2 r4 47k r4 47k r5 10 r5 10 r9 51 r9 51 r13 51 r13 51 c5 0.1u c5 0.1u c11 0.1u c11 0.1u + c4 2.2u + c4 2.2u c8 0.1u c8 0.1u c10 4.7n c10 4.7n
a a b b c c d d e e e e d d c c b b a a lin1 lin2 rin2 rin1 lout rout min/lin3 hpl hpr mpwr rin3 vc-r-p vc-r-n vc-l-p vc-l-n title size document number rev date: sheet of input/output 0 akd4644-b a3 26 wednesday, february 08, 2006 title size document number rev date: sheet of input/output 0 akd4644-b a3 26 wednesday, february 08, 2006 title size document number rev date: sheet of input/output 0 akd4644-b a3 26 wednesday, february 08, 2006 1 tp4 vc-r-n tp4 vc-r-n r24 20k r24 20k + c26 1u + c26 1u c17 0.22u c17 0.22u + c18 1u + c18 1u + c14 1u + c14 1u 6 4 3 j8 spp-l j8 spp-l 1 tp3 vc-r-p tp3 vc-r-p r21 220 r21 220 r2 2.2k r2 2.2k + c21 1u + c21 1u r14 0(short) r14 0(short) 6 4 3 j2 min/lin3/rin3 j2 min/lin3/rin3 jp2 lin1 jp2 lin1 + c2 1u + c2 1u 6 4 3 j3 lin2/rin2 j3 lin2/rin2 1 tp6 vc-l-n tp6 vc-l-n r16 0(short) r16 0(short) + c20 1u + c20 1u r18 10 r18 10 c16 0.22u c16 0.22u + c15 47u + c15 47u 6 4 3 j5 lin1/rin1 j5 lin1/rin1 jp20 lineout jp20 lineout + c13 47u + c13 47u 1 tp5 vc-l-p tp5 vc-l-p 6 4 3 j1 hp j1 hp r15 20k r15 20k r1 2.2k r1 2.2k jp18 rcn jp18 rcn r22 20k r22 20k jp3 rin1 jp3 rin1 jp17 lin3 jp17 lin3 r17 10 r17 10 + c3 1u + c3 1u jp19 rcp jp19 rcp + c19 1u + c19 1u 6 4 3 j6 lout/rout/rcv j6 lout/rout/rcv 6 4 3 j7 spp-r j7 spp-r r23 220 r23 220
a a b b c c d d e e e e d d c c b b a a vcc d3v d3v reg 4114_pdn d3v sdto dir_sdto dir_bick dir_lrck dir_mclk d3v d3v d3v d3v d3v vcc title size document number rev date: sheet of dir/dit 0 akd4644-b a3 36 wednesday, february 08, 2006 title size document number rev date: sheet of dir/dit 0 akd4644-b a3 36 wednesday, february 08, 2006 title size document number rev date: sheet of dir/dit 0 akd4644-b a3 36 wednesday, february 08, 2006 for 74hc14 vcc reg 1 2 14 7 u3a 74hc14 u3a 74hc14 + c36 10u + c36 10u c34 0.1u c34 0.1u 1 2 x1 11.2896mhz x1 11.2896mhz r26 18k r26 18k + c22 47u + c22 47u r27 1k r27 1k jp21 reg-sel jp21 reg-sel in out gnd t1 ta48033f t1 ta48033f c35 0.1u c35 0.1u c28 0.1u c28 0.1u c33 5p c33 5p out 1 vcc 3 gnd 2 port1 torx141 port1 torx141 c31 0.47u c31 0.47u 1 2 l1 47u l1 47u c24 0.1u c24 0.1u + c29 10u + c29 10u k a led1 erf led1 erf tp1 tp1 r25 470 r25 470 + c37 10u + c37 10u r38 47k r38 47k c30 0.1u c30 0.1u + c27 10u + c27 10u c23 0.1u c23 0.1u r29 5.1 r29 5.1 c25 0.1u c25 0.1u gnd 1 vcc 2 in 3 port2 totx141 port2 totx141 r28 47k r28 47k c38 0.1u c38 0.1u ips0 1 nc 2 dif0 3 test2 4 dif1 5 nc 6 dif2 7 ips1 8 p/sn 9 xtl0 10 xtl1 11 tvdd 13 dvss 14 tx0 15 tx1 16 bout 17 cout 18 uout 19 vout 20 dvdd 21 dvss 22 mcko1 23 bick 26 mcko2 27 daux 28 xto 29 xti 30 pdn 31 cm0 32 cm1 33 ocks1 34 ocks0 35 int0 36 avdd 38 r 39 vcom 40 avss 41 rx0 42 nc 43 rx1 44 test1 45 rx2 46 nc 47 rx3 48 vin 12 lrck 24 sdto 25 int1 37 u2 ak4114 u2 ak4114 1 2 l2 10u l2 10u c32 5p c32 5p
a a b b c c d d e e e e d d c c b b a a pdn lrck cdti csn dir_lrck dir_sdto mcki dir_mclk dir_bick cclk sdto bick sdti d3v 4114_pdn reg d3v d3v d3v title size document number rev date: sheet of logic 0 akd4644-b a3 46 wednesday, february 08, 2006 title size document number rev date: sheet of logic 0 akd4644-b a3 46 wednesday, february 08, 2006 title size document number rev date: sheet of logic 0 akd4644-b a3 46 wednesday, february 08, 2006 vcc dir scl/cclk sda/cdti csn h l bick adc sdti mclk lrck 3-wire i2c jp11 sdti jp11 sdti r30 10k r30 10k r35 10k r35 10k r32 470 r32 470 jp7 lrck2 jp7 lrck2 jp9 mclk jp9 mclk 3 4 14 7 u3b 74hc14 u3b 74hc14 jp14 cad0 jp14 cad0 2 1 3 sw1 pdn sw1 pdn c39 0.1u c39 0.1u r34 470 r34 470 r33 10k r33 10k jp8 lrck jp8 lrck jp10 bick jp10 bick r31 470 r31 470 r37 10k r37 10k jp15 sda jp15 sda 5 6 14 7 u3c 74hc14 u3c 74hc14 1 2 3 4 5 6 7 8 9 10 port3 dsp port3 dsp r36 10k r36 10k a1 2 a2 3 a3 4 a4 5 a5 6 a6 7 a7 8 a8 9 g1 1 g2 19 y1 18 y2 17 y3 16 y4 15 y5 14 y6 13 y7 12 y8 11 vcc 20 gnd 10 u4 74lvc541 u4 74lvc541 c40 0.1u c40 0.1u jp6 bick2 jp6 bick2 k a d3 hsu119 d3 hsu119 1 2 3 4 5 6 7 8 9 10 port4 ctrl port4 ctrl
a a b b c c d d e e e e d d c c b b a a d3v title size document number rev date: sheet of pin 0 akd4644-b a3 56 wednesday, february 08, 2006 title size document number rev date: sheet of pin 0 akd4644-b a3 56 wednesday, february 08, 2006 title size document number rev date: sheet of pin 0 akd4644-b a3 56 wednesday, february 08, 2006 13 12 14 7 u3f 74hc14 u3f 74hc14
a a b b c c d d e e a a b b c c d d e e vc-r-n vc-l-p vc-l-n d3v spk-pdn rout vc-r-p lout cdti cclk d3v vcc spk-pdn vcc vcc title size document number rev date: sheet of ak7830 0 akd4644-b a3 66 wednesday, february 08, 2006 title size document number rev date: sheet of ak7830 0 akd4644-b a3 66 wednesday, february 08, 2006 title size document number rev date: sheet of ak7830 0 akd4644-b a3 66 wednesday, february 08, 2006 h l vcc gnd 2 1 3 sw2 spk-pdn sw2 spk-pdn jp22 bst-pd jp22 bst-pd vcoil test bst-pdn vfb dvddi pdn sda scl vc in-r-n in-r-p in-l-n in-l-p vbat vss4 vc-l-n vc-l-p vc-r-n vc-r-p vdd2 vdd1 vss2 vss1 vss3 ak7830 u5 ak7830 ak7830 u5 ak7830 c47 0.1u c47 0.1u + c44 10u + c44 10u 1 2 d5 diode d5 diode c48 0.1u c48 0.1u c42 0.1u c42 0.1u c41 0.01u c41 0.01u + c46 10u + c46 10u k a d4 hsu119 d4 hsu119 9 8 14 7 u3d 74hc14 u3d 74hc14 + c45 2.2u + c45 2.2u c43 0.1u c43 0.1u 11 10 14 7 u3e 74hc14 u3e 74hc14 1 2 l3 1u l3 1u r39 10k r39 10k
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